喻文健，男，博士，現(xiàn)任清華大學計算機科學與技術系副教授。他曾榮獲2022年度“中國計算機學會夏培肅獎科技成果獎”自然科學二等獎。
基本資料
教育背景
工學學士 (計算機科學與技術), 清華大學, 中國, 1999;
工學碩士 (計算機科學與技術), 清華大學, 中國, 2001;
工學博士 (計算機軟件與理論), 清華大學, 中國, 2003.
社會兼職
《計算機輔助設計與圖形學學報》: 編委 (2010-2012);
ASP-DAC 2005, 2007, 2008: 程序委員會委員 (2005-2008);
SLIP 2009: 程序委員會委員 (2009).
科研概況
研究領域
數(shù)值算法與軟件
研究概況
自1999年開始，一直從事超大規(guī)模集成電路互連寄生參數(shù)提取的算法研究與軟件開發(fā)。
2004年至2007年，面向硅基數(shù)模混合電路和射頻電路的設計，我著重研究了基于邊界元法的襯底耦合參數(shù)提取和高頻阻抗提取算法。
2005年至2008年，多次訪問加利福尼亞大學圣迭戈分校（加利福尼亞大學-圣地亞哥分校），在互連分析與電路仿真方面開展了合作研究。我的主要學術貢獻有：
1. 發(fā)展、提出了基于直接邊界元法的三維電容提取快速算法。我主持開發(fā)的兩個軟件原型——QBEM和HBBEM（與王澤毅教授一起）——作為電容求解引擎，已被美國ICScape、日本JEDAT等公司嵌入面向超大規(guī)模集成電路設計和液晶平面顯示器設計的商業(yè)軟件中。HBBEM的核心算法被IBM Watson研究中心采用并用于開發(fā)IBM的首要三維互連電容求解器軟件CSurf。
2. 提出了多項基于VLSI新工藝特點的互連電容、電阻提取算法，用于處理懸浮金屬啞元、多通孔等復雜結構以及片內(nèi)隨機工藝變動。我在該方向的論文發(fā)表于期刊IEEE Trans. Computer-Aided 設計、IEICE Trans. 電子學和會議DATE 2008、DAC 2009中，獲得學術界和工業(yè)界的關注。
3. 針對數(shù)模混合和射頻芯片的襯底耦合問題，提出了適應性強、計算效率高的襯底電阻提取算法和頻變參數(shù)提取算法。我在該方向的論文發(fā)表于期刊IEEE Trans. Computer-Aided Design中。
4. 提出了基于階躍響應的互連信號眼圖（eye-diagram）預測算法，并與UCSD的合作者一起提出了用于片外互連的無源均衡電路設計優(yōu)化算法，發(fā)展了基于頻域分析的大規(guī)模互連電路瞬態(tài)仿真算法。我在該方向的論文發(fā)表于期刊IEEE Trans. Computer-Aided 設計、IEICE Trans. 電子學和國際會議DAC 2008、ICCAD 2008中。
在集成電路建模與仿真、尤其是寄生參數(shù)提取領域，我是國際上一位比較活躍的研究者，多次被邀請擔任國際會議程序委員會委員，并為本領域最重要的國際期刊審稿。
研究課題
國家自然科學基金面上課題: 有耗襯底電磁參數(shù)的邊界元提取算法研究 (2005-2008);
國家自然科學基金面上課題: VLSI芯片級完整耦合互連寄生參數(shù)提取算法研究 (2005-2008);
清華大學信息科學技術學院基礎研究基金課題: 45 納米及其后CMOS 技術代互連分析與算法研究 (2006-2008);
國家科技重大專項“十一五”課題: 先進EDA工具平臺開發(fā)（清華大學部分） (2008-2010).
獎勵與榮譽
教育部自然科學二等獎: 超大規(guī)模集成電路物理級優(yōu)化和驗證問題基礎研究 (2005);
全國百篇優(yōu)秀博士論文提名 (2005).
學術成果
Ling Zhang, Wenjian Yu, Yulei Zhang, Renshen Wang, Alina 德語, George A. Katopis, Daniel M. Dreps, James Buckwalter, Ernest S. Kuh and Chung-Kuan Cheng, “Analysis and optimization of low 功率 passive equalizers for CPU-memory links,” IEEE Trans. Advanced Packaging, 2010 (accepted)
Wanping Zhang, Wenjian Yu, Xiang Hu, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Nuriyoki Ito, and Chung-Kuan Cheng, “Efficient 功率 network analysis considering multidomain clock gating,” IEEE Trans. Computer-Aided 設計, 28(9): 1348-1358, 2009.
Shan Zeng, Wenjian Yu, Jin Shi, Xianlong Hong, and Chung-Kuan Cheng, “Efficient partial reluctance extraction for large-scale regular 功率 grid structures,” IEICE Trans. on Fundamentals, Vol. E92-A, No.6 pp. 1479-1484, Jun. 2009
Wenjian Yu, Rui Shi, and Chung-Kuan Cheng, “Accurate eye diagram prediction based on step response and its application to low-功率 equalizer 設計,” IEICE Trans. on 電子學, Vol. E92-C, No.4, pp. 444-452, Apr. 2009
Wenjian Yu, Xiren Wang, Zuochang Ye, and Zeyi Wang, “Efficient extraction of 頻率dependent substrate parasitics using direct boundary element method,” IEEE Trans. Computer-Aided 設計, 27(8): 1508-1513, 2008
Wenjian Yu, Changhao Yan, and Zeyi Wang, “A mixed surface integral formulation for 頻率dependent 電感 calculation of 3D interconnects,” Engineering Analysis with Boundary Elements, 2007, 31(10): 812-818
Xiren Wang, Wenjian Yu and Zeyi Wang, “Efficient direct boundary element method for resistance extraction of substrate with arbitrary doping profile,” IEEE Trans. Computer-Aided 設計, 2006, vol. 25, no. 12, pp. 3035-3042.
Zuochang Ye, Wenjian Yu, and Zhiping Yu, “Efficient 3D 電容 extraction considering lossy substrate with multi-layered Green’s 函數(shù),” IEEE Trans. Microwave Theory Tech., 2006, 54(5): 2128-2137
Wenjian Yu, Mengsheng Zhang and Zeyi Wang, “Efficient 3-D extraction of interconnect 電容 considering floating metal-fills with boundary element method,” IEEE Trans. Computer-Aided 設計, 2006, 25(1): 12-18.
Wenjian Yu, Zeyi Wang and Xianlong Hong, “Preconditioned multi-zone boundary element analysis for fast 3D electric simulation,” Engineering Analysis with Boundary Elements, 2004, 28(9): 1035-1044.
Wenjian Yu and Zeyi Wang, “Enhanced QMM-BEM solver for three-dimensional multipledielectric？ 電容 extraction within the finite domain”, IEEE Trans. Microwave Theory Tech., 2004, 52(2): 560-566
Taotao Lu, Zeyi Wang and Wenjian Yu, “Hierarchical block boundary-element method (HBBEM): A fast field solver for 3-D 電容 extraction,” IEEE Trans. Microwave Theory Tech., Vol. 52, No. 1, pp 10-19, 2004.
Wenjian Yu, Zeyi Wang and Jiangchun Gu, “Fast capacitance extraction of actual 3-D VLSI interconnects using quasi-multiple medium accelerated BEM,” IEEE Trans. Microwave Theory Tech., 2003, 51(1): 109-120
Wenjian Yu, Chao Hu, and Wangyang Zhang, “Variational 電容 extraction of on-chip interconnects based on continuous surface model,” in Proc. 設計 自動化技術 Conference (DAC), San Francisco, CA, USA, July. 2009, pp 758-763.
Wanping Zhang, Yi Zhu, Wenjian Yu, et al., “Noise minimization during 功率-up stage for a multi-domain power network,” in Proc. IEEE ASP-DAC 2009, Yokohama, Japan, Jan. 2009, pp. 391-396.
Rui Shi, Wenjian Yu, Yi Zhu, Chung-Kuan Cheng, and Ernest S. Kuh, “Efficient and accurate eye diagram prediction for high speed signaling,” in Proc. International Conference on Computer-Aided 設計 (ICCAD), San Jose, CA, USA, Nov. 2008, pp. 655-661
Ling Zhang, Wenjian Yu, Haikun Zhu, A. 德語, G. A. Katopis, D. M. Dreps, E. Kuh, and C.-K. Cheng, “Low 功率 passive equalizer optimization using tritonic step response,” in Proc. 設計 自動化技術 Conference (DAC), Anaheim, CA, USA, Jun. 2008, pp 570-573.
Wangyang Zhang, Wenjian Yu, Zeyi Wang, Zhiping Yu, Rong Jiang, and Jinjun Xiong, “An efficient method for chip-level statistical 電容 extraction considering process variations with spatial correlation,” in Proc. ACM/IEEE 設計, 自動化技術 & Test in Europe Conference (DATE), Munich, Germany, Mar. 2008, pp. 580-585
Wanping Zhang, Yi Zhu, Wenjian Yu, et. al, “Finding the worst 電壓 violation in multi-domain clock gated 功率 network,” in Proc. ACM/IEEE 設計, 自動化技術 & Test in Europe Conference (DATE), 慕尼黑, Germany, Mar. 2008, pp. 537-540
Fang Gong, Wenjian Yu, Zeyi Wang, Zhiping Yu, Changhao Yan, “Efficient techniques for 3-D impedance extraction using mixed boundary element method,” in Proc. IEEE ASP-DAC 2008, 首爾特別市, Korea, Jan. 2008, pp. 158-163.
Xiren Wang, Wenjian Yu, Zeyi Wang, “A new boundary element method for multiple-頻率 parameter extraction of lossy substrates,” in Proc. IEEE ASP-DAC 2007, 橫濱市, Japan, Jan. 2007, pp. 62-67. (best paper candidate)
Changhao Yan, Wenjian Yu, and Zeyi Wang, “A mixed boundary element method for extracting 頻率dependent 電感s of 3D interconnects,” in Proc. 7th International Symposium on Quality Electronic 設計 (ISQED), San Jose, CA, USA, Mar. 2006, pp. 709-714. (best paper candidate)
Mengsheng Zhang, Wenjian Yu, Yu Du and Zeyi Wang, “An efficient algorithm for 3-D reluctance extraction considering high 頻率 effect,” in Proc. IEEE ASP-DAC 2006, 橫濱市, Japan, Jan. 2006, pp. 521-526.
Xiren Wang, Wenjian Yu, Zeyi Wang, “A new boundary element method for accurate modeling of lossy substrates with arbitrary doping profiles,” in Proc. IEEE ASP-DAC 2006, 橫濱市, Japan, Jan. 2006, pp. 683-688.
Changhao Yan, Wenjian Yu, Zeyi Wang, “Calculating 頻率dependent inductance of VLSI interconnect by complete multiple reciprocity boundary element method,” in Proc. IEEE ASP-DAC 2006, 橫濱市, Japan, Jan. 2006, pp. 844-849.
Xiren Wang, Wenjian Yu and Zeyi Wang, “Substrate resistance extraction with direct boundary element method,” in Proc. IEEE ASP-DAC 2005, Shanghai, China, Jan. 2005, pp. 208-211.
Wenjian Yu and Zeyi Wang, “An efficient quasi-multiple medium algorithm for the 電容 extraction of actual 3-D VLSI interconnects,” in Proc. IEEE ASP-DAC 2001, 橫濱市, Japan, Jan. 2001, pp. 366-371. (best paper candidate)
Wenjian Yu and Zeyi Wang, "Capacitance extraction," in Encyclopedia of RF and Microwave Engineering , K. Chang [Eds.] , John Wiley & Sons Inc., 2005.
喻文健, 徐寧 譯.《超大規(guī)模集成電路互連分析與綜合》, 清華大學出版社, 2008年. 原著: C.-K. Cheng, J. Lillis, S. Lin, N. Chang, Interconnect Analysis and Synthesis, John-Wiley, 2000
喻文健等 譯.《Matlab數(shù)值計算》, 機械工業(yè)出版社, 2006年. 原著: Cleve B. Moler, Numerical Computing with MATLAB, SIAM Press, 2004
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